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LT5506EUF#TRPBF

廠商:
Linear
類別:
I/Q解調(diào)器
包裝:
-
封裝:
QFN
無鉛情況/ROHS:
無鉛
描述:
40MHz to 500MHz Quadrature Demodu...

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  • 參數(shù)
  • 描述
  • 文檔
參數(shù) 數(shù)值
Max Frequency (MHz) 500
Min Frequency (MHz) 40
New no
Function Quadrature Demodulator
Supply Voltage Range 1.8V to 5.25V
Noise Figure (dB) 6.8
Featured no
Extended Temp E
IIP3 (dB) -0.5
LO Leakage (dB)
Features VGA + 8.8MHz LPF
Isupply (mA) 26.5
Packages QFN-16
Applications IEEE802.11 DSSS and FHSS. WLAN. WLL
Description 40MHz to 500MHz Quadrature Demodulator with VGA
Date Added 1984-01-01
Price 1k * $3.35 (LT5506EUF)

特點
Wide Range 1.8V to 5.25V Supply
Frequency Range: 40MHz to 500MHz
–4dB to 59dB Variable Power Gain
THD <0.12% (–58dBc) at 800mV P-P Differential Output Level
8.8MHz I/Q Lowpass Output Noise Filters
IF Overload Detector
Baseband I/Q Amplitude Imbalance: 0.2dB
Baseband I/Q Phase Imbalance: 0.6°
6.8dB Noise Figure at Max Gain
Input IP3 at Low Gain: – 0.5dBm
Low Supply Current: 27mA
Low Delay Shift Over Gain Control Range: 2ps/dB
Outputs Biased Up While in Standby
16-Lead QFN 4mm x 4mm Package with Exposed Pad

典型應(yīng)用

典型應(yīng)用

描述
The LT?5506 is a 40MHz to 500MHz monolithic integrated quadrature demodulator with variable gain amplifier (VGA), designed for low voltage operation. It supports standards that use a linear modulation format. The chip consists of a VGA, quadrature down-converting mixers and lowpass noise filters. The LO port consists of a divide-by-two stage and LO buffers. The IC provides all building blocks for IF down-conversion to I and Q baseband signals with a single supply voltage of 1.8V to 5.25V. The VGA gain has a linear-in- dB relationship to the control input voltage. Hard-clipping amplifiers at the mixer outputs reduce the recovery time from a signal overload condition. The lowpass filters reduce the out-of-band noise and spurious frequency components. The cut-off frequency of the noise filters is approximately 8.8MHz. The external 2xLO frequency is required to be twice the IF input frequency for the mixers. The standby mode provides reduced supply current and fast transient response into the normal operating mode when the I/Q outputs are AC-coupled to a baseband chip.

數(shù)據(jù)表 (英文)
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設(shè)計要點 (英文)
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LT5506EUF#TRPBFPDF下載 點擊下載 點擊下載 DN64 - RS232 Transceivers for Hand Held Computers Withstand 10kV ESD
可靠性數(shù)據(jù)
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產(chǎn)品選型卡
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